This book presents models and procedures to design pipeline analog-to-digital converters, compensating for device inaccuracies, so that high-performance specs can be met within short design cycles. These models are capable of capturing and predicting the behavior of pipeline data converters within less than half-a-bit deviation, versus transistor-level simulations. As a result, far fewer model iterations are required across the design cycle. Models described in this book accurately predict transient behaviors, which are key to the performance of discrete-time systems and hence to the performance of pipeline data converters.
發表於2024-12-27
Device-level Modeling and Synthesis of High-performance Pipeline ADCs 2024 pdf epub mobi 電子書 下載
圖書標籤: 英文原版 專業書 Modeling IC
Device-level Modeling and Synthesis of High-performance Pipeline ADCs 2024 pdf epub mobi 電子書 下載