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Design Verification with e (Prentice Hall Modern Semiconductor Design Series' Sub Series 2024 pdf epub mobi 電子書下載

Design Verification with e (Prentice Hall Modern Semiconductor Design Series' Sub Series

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E is a new Hardware Verification Language, or HVL. Verification is one of the most time consuming and cumbersome processes in hardware design. Design teams spend 50% to 70% of their time verifying designs, rather than creating new ones. As designs grow more complex, the verification problems increase exponentially - when a design doubles in size, the verification effort can easily quadruple. In the past design teams have used Verilog and VHDL. E gives engineers the speed and efficiency they have been craving, while also allowing for simulation of other components as well. This book emphasizes breadth rather than depth. It imparts to the reader a working knowledge of a broad variety of e-based topics, thus giving the reader a global understanding of e-based design verification. This book should be classified not only as an e book but, more generally, as a design verification book. Due to its popularity, it is likely that e will be standardized in the future.

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發表於2024-07-06

Design Verification with e (Prentice Hall Modern Semiconductor Design Series' Sub Series 2024 pdf epub mobi 電子書下載

Design Verification with e (Prentice Hall Modern Semiconductor Design Series' Sub Series 2024 pdf epub mobi 電子書下載

Design Verification with e (Prentice Hall Modern Semiconductor Design Series' Sub Series 2024 pdf epub mobi 電子書下載

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出版者:Prentice Hall PTR

作者:Samir Palnitkar

出品人:

頁數:416

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出版時間:2003-10-05

價格:USD 89.00

裝幀:Paperback

isbn號碼:9780131413092

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圖書標籤: 驗證

Design Verification with e (Prentice Hall Modern Semiconductor Design Series' Sub Series 2024 pdf epub mobi 電子書下載

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